Detailansicht
Design and Performance Analysis of CMOS Ring Oscillator
ISBN/EAN: 9783659551574
Umbreit-Nr.: 7378580
Sprache:
Englisch
Umfang: 116 S.
Format in cm: 0.7 x 22 x 15
Einband:
kartoniertes Buch
Erschienen am 10.10.2014
Auflage: 1/2014
- Zusatztext
- In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This book introduces a multistage voltage controlled ring oscillator. The proposed structure uses 45 nm CMOS Technology in cadence. PSS analyses are performed in order to determine the frequency of oscillation and the influence of parameters such as supply voltage, temperature or load capacitance over the oscillation frequency. A transient analysis is performed to illustrate the effects of the parasitic parameters over the oscillation frequency. Ring oscillators with different number of stages like 7, 9 and 11 were designed successfully and their performance parameters are discussed in great detail and compared to reach to solutions to the challenges faced by the current Ring Oscillator technology. The challenges are phase noise, frequency jitter, period jitter, delay, jitter, total harmonic distortion (THD), transfer function etc. and are dealt appropriately in the system designs proposed for different number of stages. For example, a certain signal may have a phase noise of -80 dBc/Hz at an offset of 10 KHz.
- Autorenportrait
- Sushil Kumar received his M.Tech.(VLSI Design) and PGC M.Sc.(Telecom. & Electronic Engg.) with merit from Gautam Buddha University and Sheffield Hallam University respectively in 2012 and is currently working towards the Ph.D. degree in Electronics and Communication Engineering. His current research interest is CMOS wireless communication networks.